A processor integrated circuit according to the present invention comprises low-speed and high-speed computing units (110),(120) as two or more kinds of computing units, a program memory (131) as a first storage unit in which programs for operation the computing units are stored, a data memory (second storage unit) (132) as a memory area to be used for computation by the computing units, and selectors (141),(142) as first and second connection switching units for connecting a computing unit that performs computation to the first and second storage units, wherein the program memory (131) and the data memory (132) are connected to the low-speed computing unit (110) or the high-speed computing unit (120). In this construction, it is possible to achieve both of securing in program compatibility and speeding-up without increasing the circuit scale and power consumption of the processor integrated circuit.