The de-blocking filter is base on interlaced filter sequence and uses two 1D filter units combined with macro block data memory unit, upper part data memory unit, left data memory unit and intermediate data memory unit so as to greatly increase the filter speed. By selecting proper filter sequence, the invention utilizes the data-to-data dependency; the data of each block required by the filter can be read once from outside so as to reduce the access times to the external SRAM/SDRAM and to reduce the complexity of filter operation; meanwhile, a parallel storage mechanism is used in the memory subsystem and data path in order to simultaneously support the parallel access in both vertical and horizontal directions. By introducing the memory structure provide by the invention, the traditional transposition circuit is not needed any more.