A manufacturing method for a test structure of an LDD doped region square resistance comprises steps of providing a semiconductor substrate with a grid layer, wherein the semiconductor substrate is provided with a first region and a second region, patterning the grid layer, forming a grid electrode on the second region and at least two grid electrode on the first region, executing an LDD doping process to form LDD doped regions respectively in the semiconductor substrate between the grid electrodes of the first region and on the semiconductor substrate on two sides of the grid electrode of the second region, forming dielectric layers on the semiconductor substrate on the grid electrodes, on the lateral walls of the grid electrodes and between the grid electrodes, etching to remove the dielectric layers on the top of the grid electrodes and remaining a part of or the total dielectric layers on the LDD doped region of the first region. The invention further provides a test structure of an LDD doped region square resistance, which can be favorable for increasing testing precision of the LDD doped region square resistance.