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发明公开
CN101651126A 芯片封装件及其制造方法 无效 - 驳回

芯片封装件及其制造方法
摘要：
本发明提供了一种芯片封装件及其制造方法，所述芯片封装件包括：具有第一区域和环绕第一区域的第二区域的载体基板，第一区域的厚度大于第二区域的厚度，并在该载体基板一面形成多个分隔槽，以将所述载体基板的第二区域分为多个子基板；设置在所述载体基板第一区域上通过粘结层粘结的芯片，该芯片具有输入输出端口；用于将所述芯片的输入输出端口与所述载体基板电结合的多条引线；覆盖在所述载体基板上的包封层，以用于包封所述的芯片和多条引线。
摘要（英）：

The invention provides a chip packing part and a manufacturing method thereof. The chip packing part comprises a carrier substrate, a chip, a plurality of leads and a packing layer, wherein the carrier substrate is provided with a first area and a second area surrounding the first area; the thickness of the first area is greater than that of the second area; one side of the carrier substrate is provided with a plurality of separation troughs to divide the second area of the carrier substrate into a plurality of sub-substrates; the chip is arranged on the first area of the carrier substrate, isbonded by a bonding layer, and is provided with an input and output port; the plurality of leads are used for electrically combining the input and output port of the chip with the carrier substrate;and the packing layer is covered on the carrier substrate for packing the chip and the plurality of leads.

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