An information processor includes a first recording unit (13) which stores first information indicating correspondence between an instruction address and a branch destination address of a most recent branch instruction, a computation of the most recent branch instruction having been completed and a branch for the most recent branch prediction having been taken, a second recording unit (14) which stores second information indicating correspondence between an instruction address and a branch destination address of each of past branch instructions including the most recent branch instruction, computations of the past branch instructions having been completed and branches for the past branch instructions having been taken, and a control unit (12) which makes a branch prediction based on the first information or the second information, and stops supply of a clock to the second recording unit (14) and makes a branch prediction based on the first information when an instruction sequence enters a loop.