The invention relates to an accurate, quick and high-precision channel delay compensation method. After passing through an SDH (Synchronous Digital Hierarchy) network, time code information which is transmitted by a main station end reaches a slave station end and then a time code is returned from the slave station end, and the time code is returned to the main station end after passing through the SDH network of a symmetric path. An FPGA (Field Programmable Gate Array) high-speed clock counter is opened by the main station end when the time code is transmitted and is stopped after the time code is received, i.e., channel bidirectional transmission time T1 can be measured. After channel time is repeatedly measured for many times, a count value is compensated according to a frequency synchronization principle, so that accurate channel delay can be obtained, and a reference is provided for application of an SDH ground synchronization network in the aspect of time unification.