The invention discloses CDMOS technology and a manufacturing method. The main content of the manufacturing method comprises: that a depleted NOMS device in the CDMOS technology in the prior art is replaced by a PMOS device; that in order to achieve such replacement, an N-type isolating trap is applied in manufacturing technology, that the N-type isolating trap in located in the space of a P-type isolating trap, that the applied PMOS device operates in the N-type isolating trap, and that being an enhanced device, the PMOS device just operates when the voltage value of the grid electrode of the PMOS device reaches a set starting voltage value, or the PMOS device does not operate. Compared with a conventional depleted NOMS device, a problem of large chip standby power consumption caused by large static leakage current of the depleted NOMS device out of operative state can be prevented.