The invention discloses a manufacturing method for a fin structure of a dual graphical fin type transistor. The method comprises the steps that the partial etching method is adopted, namely, the second amorphous carbon layer etching thickness almost ranges from one half to three fourths; a silicon dioxide film is deposited, and a silicon dioxide side wall isolation hard mask graph is formed through etching; then, dry etching is utilized for removing a nitrogen-free anti-reflection layer on the top of a core sacrificial layer graph to expose amorphous carbon below the nitrogen-free anti-reflection layer; finally, the plasma dry etching technology is utilized for removing the exposed second amorphous carbon layer, and a hard mask line composed of the silicon dioxide side wall and the amorphous carbon below the silicon dioxide side wall is formed. According to the manufacturing method for the fin structure of the dual graphical fin type transistor, the morphology and key size control problem produced by an existing method is avoided, so that a follow-up graphical technological window is enlarged, and the key size and morphology of the fin structure can be more easily controlled.