A predetermined waveform is generated using a lower frequency clock signal (16) and a higher frequency clock signal (18). The waveform transitions between first and second states (12, 14) in synchrony with timing signals (18-1 to 18-11) of the higher frequency clock signal (18). The higher frequency clock is operated if the waveform will transition between the first and second states (12, 14) before the next timing signal (16-2) of the lower frequency clock. The higher frequency clock is powered down if the waveform will not transition between the first and second states (12, 14) before the next timing signal (16-3) of the lower frequency clock. The predetermined waveform can thus be generated having higher resolution but with lower power consumption.