The invention relates to a display driver. An object of the present invention is to provide the display driver adaptable to the specifications of various kinds of display devices while suppressing generation of noise. Voltages corresponding to the pieces of pixel data output from the first to N-th latches are applied to each of the data lines of the display device. The first to N-th latches are configured to capture N pieces of pixel data indicative of the luminance levels of the respective pixels in synchronization with the first to N-th capture clock signals each having different edge timing. In this case, an N-stage shift register captures a single pulse load signal which is synchronized with a horizontal synchronizing signal in a video signal while sequentially shifting the load signal to subsequent stages in synchronization with a reference timing signal supplied from the outside. Outputs of the first to N-th flip-flops formed in the N-stage shift register are supplied as first to N-th capture clock signals, to the first to N-th latches, respectively.