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CN105097744A 晶片封装体及其制造方法 无效 - 撤回

晶片封装体及其制造方法
摘要：
本发明揭露一种晶片封装体及其制造方法，该晶片封装体包括：一第一装置基底，贴附于一第二装置基底的一第一表面上；一第三装置基底，贴附于第二装置基底相对于第一表面的一第二表面上；一绝缘层，覆盖第一装置基底、第二装置基底及第三装置基底，其中绝缘层内具有至少一开口；至少一凸块，设置于开口的底部下方；一重布线层，设置于绝缘层上，且经由开口电性连接至凸块。本发明可缩小后续接合的电路板的尺寸，且能够简化制程、降低成本。
摘要（英）：

A chip package including a first device substrate is provided. The first device substrate is attached to a first surface of a second device substrate. A third device substrate is attached to a second surface of the second device substrate opposite to the first surface. An insulating layer covers the first, second and third device substrates and has at least one opening therein. At least one bump is disposed under a bottom of the opening. A redistribution layer is disposed on the insulating layer and electrically connected to the bump through the opening. A method for forming the chip package is also provided. The method can minimize the size of circuit board, simplify the manufacture process, and reduce the cost.

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