The invention discloses a GaN vertical heterojunction field-effect transistor with a charge compensation voltage-resistant structure. The device is characterized in that the GaN vertical heterojunction field-effect transistor with the charge-compensation voltage-resistant structure further comprises a barrier layer, a channel layer, a current barrier layer and a charge compensation insulating layer outside an n-GaN buffer layer, and the fixed charges high in density exist at boundaries between the charge compensation insulating layer and the barrier layer, the channel layer, the current barrier layer and the n-GaN buffer layer, wherein the charge compensation insulating layer is formed by an insulating dielectric medium. The fixed charges high in density exist at boundary between the charge compensation insulating layer and the n-GaN buffer layer, so that in a voltage resistance process, negative charges at the boundary enable inversion of the closer n-GaN buffer layer, a formed p+ column consumes electrons in the n-GaN buffer layer, the buffer layer is enabled to form a p+n super junction structure which is completely exhausted, an electric field in the buffer layer is kept to 3MV/cm in the perpendicular direction after full optimization, and the a device breakdown voltage reaches a voltage-resistant limit of the GaN material.