A related manufacture method for a semiconductor packaging structure comprises providing a substrate, wherein the substrate possesses a first surface and a second surface which are opposite to each other, and the substrate possesses multiple via holes; fixing a bare chip to the first surface of the substrate, and electrically connecting the bare chip to the substrate; using a packaging material to wrap the bare chip and the first surface in a sealed way; and taking the packaging material as a carrier, and thinning the substrate from the second surface of the substrate so as to expose the multiple via holes.