A method for preparing a gate-all-around structure. The method comprises: providing a semiconductor substrate (100), forming a composite layer on the semiconductor substrate (100), and patterning the composite layer, the composite layer successively comprising a dielectric layer (201), a buried gate electrode layer (202) and a barrier layer (203) from bottom to top; forming a side wall (204) at the periphery of the composite layer, growing an epitaxial layer (205) at the periphery of the side wall (204), and planarizing the epitaxial layer (205), so that an upper surface of the barrier layer (203) is flush with an upper surface of the side wall (204) and an upper surface of the epitaxial layer (205); removing the barrier layer (203), and depositing a first high-K dielectric layer (206) with a thickness equal to that of same; growing a fin layer (301), and forming a fin structure (302); forming a dielectric isolation layer (303) on the epitaxial layer (205); forming a second high-K dielectric layer (304) at the side wall and the top of the fin structure (302); and growing a second gate electrode layer (305), and forming a gate electrode structure (306) crossing and surrounding the fin structure (302). The gate electrode structure (306) effectively controls a groove from four sides in a totally surrounding manner, and compared with a dual-gate electrode structure and a tri-gate electrode structure, increases the width of the groove, so that a valid area of the groove is improved.