A device includes a first reservation station and a second reservation station. The first reservation station is used for sending a first loading microinstruction, if the first loading microinstruction is a specified loading microinstruction indicating capture of an operand from a specified resource rather than a cache on a core, and detection and indication are performed on a reservation bus. The second reservation station is coupled to the reservation bus, after a first quantity of clock periods after the first loading microinstruciton is sent, the second reservation station is used for sending a new microinstruction dependent on the first loading microinstruction for execution, and if that the first loading microinstruction is the specified loading microinstruction is indicated on the reservation bus, the second reservation station caches sending of the new microinstruction till the first loading microinsruction acquires the operand. The specified resource includes a high-order programmable interrupt controller used for executing interrupt operation.