The invention discloses a storage space multiplexing based method for increasing an effective access rate of an SDRAM bus. The method comprises the following steps: dividing four 8-bit SDRAM chips into two groups Group0 and Group1, and alternately accessing to the groups Group0 and Group1 in a time sequence by utilizing different chip selection signals based on a memory access command, wherein two SDRAM chips in each group share a chip selection signal; storing table items in an SDRAM as four mirror images in physical Banks, and generating four virtual logic Banks for a user, wherein the four mirror images are located in different physical Banks; and performing arbitrative selection on the logic Banks, and distributing a memory access request of the user to the different physical Banks to realize in-turn access among the physical Banks. According to the method, the activation time and the pre-charging time for each SDRAM access are hidden for the user through bus grouping and multiplexing based on combination of Bank mirror images and Bank arbitration, so that the access rate of the same Bank of the SDRAM is increased to 65Mpps from about 20Mpps, and the access rate requirement of 60Mpps of a 40G platform of a current network device is met.