The invention relates to energy efficient multi-modal instruction issue. A processor is described herein that is configured to switch between a first instruction issue mode of the processor and a second instruction issue mode of the processor based at least in part on a characteristic associated with a plurality of instructions. The first instruction issue mode and the second instruction issue mode are associated with different energy consumption characteristics. Also, the first instruction issue mode may be an out-of-order instruction issue mode and the second instruction issue mode may be an in-order instruction issue mode.