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发明公开
CN105789168A 半导体器件芯片焊接用的跳线框架 无效 - 驳回

半导体器件芯片焊接用的跳线框架
摘要：
本发明的一种半导体器件芯片焊接用的跳线框架，包括若干排横连筋，相邻两个横连筋之间设置有若干间隔并排的纵连筋，相邻两个纵连筋之间的间隔处设置有两个纵向并排的跳线，所述跳线的中部与两侧的纵连筋通过横向的短连筋相连接；所述跳线包括Z形弯折的线体和一体连接在线体端部的芯片焊接面。本发明的有益效果是：提高了铜材的使用率，可达80%，节约了成本，无需人工作业，可实现自动化生产，提高工作效率，产品品质及一致性得以保证。
摘要（英）：

The invention discloses a jumper wire frame for the chip welding of a semiconductor device, and the frame comprises a plurality of rows of lateral connecting ribs. A plurality of parallel longitudinal connecting ribs at intervals are respectively disposed between each two adjacent lateral connecting ribs, and the spacing between each two adjacent longitudinal connecting ribs is provided with two longitudinal parallel jumper wires. The central part of each jumper wire is connected with the longitudinal connecting ribs at two sides through a lateral short connecting rib. Each jumper wire comprises a Z-shaped line body and a chip welding surface in integrated connection with an end part of the line body. The beneficial effects of the invention are that the frame improves the utilization rate of a copper material, can reach 80%, saves the cost, does not manual operation, can achieve automatic production, improves the work efficiency, and guarantees the quality and consistency of products.

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