The invention discloses a retardation comparator, an integrated circuit and a voltage comparison method; the retardation comparator comprises the following units: a first input transistor configured on a grid electrode so as to receive a first input voltage; a second input transistor configured on the grid electrode so as to receive a second input voltage; an output end; a first node connected with a source electrode the first input transistor through a second resistor and connected with a source electrode of the second input transistor through a third resistor; a comparison output circuit connected with a drain electrode of the first input transistor and a drain electrode of the second input transistor, and configured to supply a signal to the output end, wherein the signal can indicate that the drain electrode voltage of the first input transistor is bigger or smaller than the drain electrode voltage of the second input transistor; a bias power supply configured to apply voltage on a first resistor so as to form bias current, and to supply the bias current to the first node, wherein the first, second and third resistors are resistors of the same type, and the second and third resistor have different resistance values.