The invention relates to a process mapping method and device based on white boxes. According to the embodiment, the method comprises the steps that logic synthesis is conducted on an RTL-level netlist to obtain a structurized gate-level netlist; the gate-level netlist is traversed to obtain multiple white boxes contained in the gate-level netlist; the gate-level netlist is added to the white boxes, and a time delay list is generated for each white box; according to the gate-level netlist, the multiple white boxes and the multiple time delay lists corresponding to the multiple white boxes, process mapping is performed, and logic time delay and a key route of the gate-level netlist after process processing are calculated. According to the embodiment, arithmetic logic units in the gate-level netlist are identified into the white boxes and are represented with standard combined logic gate circuits, the process mapping is conducted on the whole netlist, and a general special function unit module processing method in the process mapping process is provided.