An embodiment of the present invention provides a chip package structure, including a substrate, multiple chips and multiple discrete devices that are packaged on an upper surface of the substrate, and a heat dissipation apparatus. The heat dissipation apparatus includes an insulation layer and a thermally conductive layer that are laminated. The insulation layer completely encloses and adheres to outer surfaces of the multiple chips, outer surfaces of the multiple discrete devices, and the upper surface of the substrate, and is configured to conduct heat generated by the multiple chips and the multiple discrete devices to the thermally conductive layer and the substrate, so that the heat generated by the multiple chips and the multiple discrete devices is dissipated by using the thermally conductive layer and the substrate. In addition, an embodiment of the present invention further provides a method for manufacturing a chip package structure. The heat dissipation apparatus is disposed in the chip package structure to implement even and efficient heat dissipation for a system-level chip package.