The embodiment of the chip discloses a chip and a package method thereof. The package method of the chip comprises the steps of providing a device wafer, wherein at least one functional region and at least one wiring region are arranged on a front surface of the device wafer, the wiring region encircles the functional region, and a plurality of bonding pads are arranged on the wiring region; providing at least one cover glass wafer which is respectively arranged in correspondence to the at least one functional region, and bonding a front surface of the cover glass chip and the corresponding functional region on the device wafer; and cutting the device wafer to form at least one chip. With the chip and the package method thereof, provided by the embodiment of the invention, the cover glass chip and the corresponding functional region are bonded, the bonding pads on the wiring region are directly exposed, and thus, hermetical package of the chip is achieved; and meanwhile, the bonding pads are led out in a wafer level way by a wafer level process, a through silicon vias (TSV) process is not needed, and the process complexity and the package process are reduced.