利索-全球专利检索

  1. 登录
  2. 注册
发明授权
CN107102955B 用于存储子系统的关联和原子回写高速缓冲存储系统和方法 有权

用于存储子系统的关联和原子回写高速缓冲存储系统和方法
摘要：
本申请涉及用于存储子系统的关联和原子回写高速缓冲存储系统和方法。响应于来自主机的可高速缓冲存储写入请求，从自由列表中分配物理高速缓冲存储位置，并且在不考虑到对应逻辑地址的任何读取请求是否待决的情况下将数据块写入所述高速缓冲存储位置。在所述数据已经写入之后，同样在不考虑任何读取请求是否针对所述对应逻辑地址待决的情况下，更新元数据以使所述高速缓冲存储位置与所述逻辑地址相关联。维持针对具有有效数据的每个高速缓冲存储位置待决的数据存取请求的计数，并且仅当所述计数指示没有数据存取请求针对所述高速缓冲存储位置待决时将高速缓冲存储位置返回到所述自由列表。
摘要（英）：

In response to a cacheable write request from a host, physical cache locations are allocated from a free list, and the data blocks are written to those cache locations without regard to whether any read requests to the corresponding logical addresses are pending. After the data has been written, and again without regard to whether any read requests are pending against the corresponding logical addresses, metadata is updated to associate the cache locations with the logical addresses. A count of data access requests pending against each cache location having valid data is maintained, and a cache location is only returned to the free list when the count indicates no data access requests are pending against the cache location.

公开/授权文献
0/0