The invention relates to the technical field of integrated chips, in particular to an LDO circuit applying to an integrated chip. The LDO circuit applying to the integrated chip comprises a reference voltage generating circuit and an error amplifier circuit, the reference voltage generating circuit provides reference voltage for the error amplifier circuit, and the output end of the error amplifier circuit is connected with a buffer stage circuit, an over-temperature protection circuit and an over-current protection circuit. The output end of the buffer stage circuit is connected to a power tube, the output end of the power tube is connected with a feedback resistance network and a load, and the error amplifier circuit receives feedback voltage of the feedback resistance network. According to the LDO circuit, improvement is conducted on the basis of a traditional low-drop-out linear voltage regulator, and the LDO circuit is high in stability and low in quiescent current.