A method for fabricating a low-temperature polycrystalline silicon thin film, comprising: forming a buffer layer (22) on a substrate (21); forming a gate electrode (23) on the buffer layer (22); forming a patterned elevated layer (26) on the gate electrode (23), the patterned elevated layer (26) covering a top surface and side surfaces of the gate electrode (23); forming a first anti-diffusion layer (241) on the patterned elevated layer (26); forming a second anti-diffusion layer (242) on the first anti-diffusion layer (241); forming a silicon layer (25) on the second anti-diffusion layer (242); annealing the silicon layer (25) to form a polycrystalline silicon layer (25), the polycrystalline silicon layer (25) comprising a patterned zone (25a) and a zone to be removed (25b), wherein the patterned zone (25a) and the patterned elevated layer (26) have the same pattern, and the entire patterned zone (25a) is located above the patterned elevated layer (26); and removing the zone to be removed (25b) in the polycrystalline silicon layer (25), only keeping the patterned zone (25a).