The embodiment of the invention discloses a programmable frequency divider. The programmable frequency divider comprises a state machine unit, a logic unit and a clock output unit, wherein the state machine unit is used for controlling the skipping of states when an input clock source cycle is up, and outputting a clock signal representing the state of the state machine unit based on the skippingof states, and the state number of the state machine unit is adaptive to a frequency dividing number; a logic unit is used for acquiring the clock signal representing the state of the state machine, and outputting a control signal to the clock output unit, the output control signal is used for controlling the clock signal output by the clock output unit to turn over when the state of the state machine meets a preset state, and the logic unit is also used for controlling the output clock signal to correct a duty ratio when the frequency dividing number is an odd number; and the clock output unit is used for outputting a frequency dividing clock signal of an equal duty ratio when the frequency dividing number is an even number, and controlling the output clock signal to correct the duty ratio when the frequency dividing number is the odd number, so as to output the frequency dividing clock signal of the equal duty ratio.