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发明公开
CN108359957A 用于物理气相沉积腔室的沉积环及静电夹盘 无效 - 驳回

用于物理气相沉积腔室的沉积环及静电夹盘
摘要：
本发明涉及用于物理气相沉积腔室的沉积环及静电夹盘。本发明的实施例大体上关于用于半导体处理腔室的处理套件，以及具有该套件的半导体处理腔室。具体而言，此述的实施例关于包括沉积环与底座组件的处理套件。该处理套件的部件单独(及组合)运作以显著地减少它们在处理期间对基板周围的电场的影响。
摘要（英）：

Embodiments of the invention generally relate to a process kit for a semiconductor processing chamber, and a semiconductor processing chamber having a kit. More specifically, embodiments described herein relate to a process kit including a deposition ring and a pedestal assembly. The components of the process kit work alone, and in combination, to significantly reduce their effects on the electric fields around a substrate during processing.

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