The embodiment of the invention provides a digital logic circuit detection method and apparatus for a base station. The base station includes a subframe counter. The method comprises: loading a plurality of subframe data packets from a use case library; determining a to-be-detected subframe in the subframe data packets based on the subframe counter; detecting the subframe; and acquiring the detection result of the subframe. Therefore, the subfframe counting width is adjusted based on the use case situation; the fast simulation function of the corresponding subframe is realized quickly; the time length of the subframe with the detection task in the subframe is reduced automatically; and the bus function is supported and the simulation top file is simplified, so that connection with the verification environment through the data bus is realized.