Technology related to register files for block-based processor architectures is disclosed. In one example of the disclosed technology, a processor core including a transactional register file and an execution unit can be used to execute an instruction block. The transactional register file can include a plurality of registers, where each register includes a previous value field and a next value field. The previous value field can be updated when a register-write message is received and the processor core is in a first state. The next value field can be updated when a register-write message isreceived and the processor core is in a second state. The execution unit can execute instructions of the instruction block. The execution unit can be configured to read register values from the previous value field and to cause register-write messages to be transmitted from the processor core when executing instructions that write to the registers.