The invention discloses a clock level boost circuit. The clock level boost circuit comprises a clock voltage input end, a clock voltage output end, a first switch tube, a second switch tube, a third switch tube, a fourth switch tube, a first capacitor, a second capacitor and an inverter. One end of the first capacitor is electrically connected with the clock voltage input end and the input end ofthe inverter, and the other end of the first capacitor is electrically connected with the drain electrode of the first switch tube, the grid electrode of the second switch tube and the grid electrodeof the third switch tube; and the drain electrode of the second switching tube is electrically connected with the clock voltage output end, the source electrode of the second switching tube is electrically connected with the source electrode of the first switching tube and the source electrode of the third switching tube, and the source electrode of the second switching tube is electrically connected with a first external power supply. The clock level boost circuit can quickly enter a normal working state, is not limited by clock input frequency in the starting process, and is wider in application range.