The invention relates to the field of network communication, in particular to an Ethernet electric port clock synchronization method, system and device. The Ethernet electric port clock synchronization method comprises the following steps that when a system receives data, a PHY and an FPGA on the local side restore clock signals in a received data packet, convert the data packet into SGMII data containing the restored and calibrated clock signals and send the SGMII data to the system; when the system sends data, the SGMII data which are sent by the MAC of the system and contain clock signals are recovered and transmitted step by step through the FPGA and the PHY on the local side, are converted into data packets containing the clock signals and are transmitted to the line side. According to the invention, the FPGA is integrated in the electric port module; the clock recovery and data transmission functions of the FPGA are utilized; the FPGA is used for extracting, recovering and transmitting the clock signals in the SGMII data, so that the synchronous clock signals can be transmitted and recovered among a plurality of communication systems along with data packets, and the purpose of electric port clock synchronization is achieved on the basis of not changing original external interfaces and communication protocols of an electric port module.