The invention discloses a fault current limiter configuration method based on minimum impedance. At present, the cost of a fault current limiter is high, and the cost is basically proportional to themagnitude of an impedance value connected to a loop in series, thus, a configuration scheme comprehensively considering layout position, fault input impedance magnitude and economic benefit needs to be studied. The fault current limiter configuration method adopts the technical scheme of: calculating a maximum short-circuit current matrix in a grid maximum operation mode; calculating a short-circuit current matrix in the mode after branch circuits are connected to a power grid in series; calculating a sensitivity matrix; calculating a busbar capacitance-to-breaking ratio matrix; judging whether an arbitrary busbar capacitance-to-breaking ratio is less than 1; connecting current limiting impedance in series to the branch circuit with the highest sensitivity at a position of the maximum busbar capacitance-to-breaking ratio; judging whether the capacitance-to-breaking ratio is less than 1; if not, continuing to increase the current limiting impedance until the capacitance-to-breaking ratio is less than 1; and finally, verifying whether all busbars meet the condition that the capacitance-to-breaking ratio is less than 1. The fault current limiter configuration method does not require acomplicated optimization algorithm and can quickly complete the minimum impedance fault current limiter configuration scheme.