A polishing composition for a semiconductor substrate comprising dihydroxyethylglycine, ceria particles, a dispersant, and an aqueous medium, wherein the ceria particles are contained in an amount of from 2 to 22% by weight of the polishing composition, and the dispersant is contained in an amount of from 0.001 to 1.0% by weight of the polishing composition; a polishing process of a semiconductorsubstrate with the polishing composition for a semiconductor substrate; and a method for manufacturing a semiconductor device including the step of polishing a substrate to be polished in accordance with the polishing process. The polishing composition is used, for example, for the steps of subjecting to shallow trench isolation, subjecting an interlayer dielectric to planarization, forming an embedded metal line, forming an embedded capacitor, and the like. Especially, the method is suitable for the step of shallow trench isolation or the step of subjecting an interlayer dielectric to planarization, and preferably used for manufacturing a semiconductor device such as memory ICs, logic ICs, or system LSIs.