发明公开
- 专利标题: Memory device
- 专利标题(中): 存储设备
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申请号: EP80101776.5申请日: 1980-04-03
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公开(公告)号: EP0017228A1公开(公告)日: 1980-10-15
- 发明人: Nagami, Akira
- 申请人: NEC CORPORATION
- 申请人地址: 7-1, Shiba 5-chome Minato-ku Tokyo JP
- 专利权人: NEC CORPORATION
- 当前专利权人: NEC CORPORATION
- 当前专利权人地址: 7-1, Shiba 5-chome Minato-ku Tokyo JP
- 代理机构: Glawe, Delfs, Moll & Partner
- 优先权: JP40671/79 19790404
- 主分类号: G11C11/24
- IPC分类号: G11C11/24 ; G11C8/00
摘要:
In a dynamic random access memory including means for inputting a row strobe signal and means for inputting a column strobe signal, and having the functions of incorporating a row address input in response to the row strobe signal and incorporating a column address input in response to the column strobe signal; the improvement comprises a first insulated gate field effect transistor having drain coupled to a first junction point, gate receiving the column strobe signal and source supplied with a first power supply, means for charging the first junction point within a period of active level of the row strobe signal, a second insulated gate field effect transistor having a drain coupled to the first junction point, gate coupled to a second junction point and source supplied with the first power supply terminal, means for precharghing the second junction point within a period of absence of the row strobe signal, and a third insulated gate field effect transistor having drain coupled to the second junction point, the gate supplied with the column strobe signal and source supplied with the first power supply. After completion of a desired operation with respect to a selected memory cell, the row strobe signal is made at its inactive level to be reset while the column strobe signal is at its active level. Then, after a necessary reset period when the row strobe signal is made active a change from inactive level to active level of the first junction point is suppressed thereby to inhibit active operation based on the column strobe signal.
公开/授权文献
- EP0017228B1 Memory device 公开/授权日:1984-07-11
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