发明公开
- 专利标题: Phase-locked loop circuit
- 专利标题(中): 相位锁定环路
-
申请号: EP83400185申请日: 1983-01-27
-
公开(公告)号: EP0085615A3公开(公告)日: 1986-03-19
- 发明人: Okada, Toshiro
- 申请人: FUJITSU LIMITED
- 专利权人: FUJITSU LIMITED
- 当前专利权人: FUJITSU LIMITED
- 优先权: JP1211682 19820128
- 主分类号: H03L07/10
- IPC分类号: H03L07/10
摘要:
A phase-locked loop circuit comprises a voltage-controlled oscillator, a phase comparator, a low-pass filter (15), a plurality of pump circuits (14S, 14F, ... ), and a selecting circuit (G 45 ) for selecting one of the pump circuits. The low-pass filter is comprised of a capacitor (C) and a plurality of resistors (R 1 , R 2 ) each connected to one of the pump circuits. By selecting one of the pump circuits to connect to a corresponding resistor, the cutoff frequency or time constant of the low-pass filter is switched in multi-steps.
信息查询