A clock phase discriminator measures phase difference between a pair of digital clock signals to produce phase error signals used to adjust the frequency of one clock so as to reduce the phase difference. The discriminator includes a latch circuit that responds to successive transitions of the clock signals by undertaking a multi-state phase measurement transition path in which only one state variable changes at a time. The latch circuit reduces the exposure of the phase discriminator to race conditions while measuring the phase difference and producing the error signals.