发明公开
- 专利标题: Data prefetching in caches
- 专利标题(中): 在缓存中预取数据
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申请号: EP90104153.3申请日: 1990-03-03
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公开(公告)号: EP0394642A2公开(公告)日: 1990-10-31
- 发明人: Liu, Lishing
- 申请人: International Business Machines Corporation
- 申请人地址: Old Orchard Road Armonk, N.Y. 10504 US
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: Old Orchard Road Armonk, N.Y. 10504 US
- 代理机构: Schäfer, Wolfgang, Dipl.-Ing.
- 优先权: US344639 19890428
- 主分类号: G06F12/08
- IPC分类号: G06F12/08
摘要:
A method using CH Loc (change-local) type information is used for data prefetch (D-prefetch) decision making. This information is stored in history tables H, there being one such table for each CP at, for example, the buffer control element (BCE). For each line L, H[L] indicates the information for L in H. Two different types of histories may be kept at H:
(1) XI-invalidates - At each H[L], there is recorded whether L was XI-invalidated without refetching.
(2) CH Loc - At each H[L], there is also recorded local-change history, i.e., whether L was stored into since the last fetch.
It is also possible to keep a global H at the storage control element (SCE). In this case, the SCE maintains a table I recording, for each line L, information I[L] recording whether L involved XI-invalidates during the last accesses by a CP. Upon a cache miss to L from a processor CP i , the SCE prefetches some of those lines that involved XI-invalidates (indicated by I) into cache C i , if missing there. The management of table I is simple. When an XI-invalidate on L occurs, e.g., upon a store or an EX fetch, the corresponding entry is set. When L is accessed, e.g., upon D-fetch misses, without XI-invalidate, the entry in I is reset. Another criteria for turning an I entry OFF is when the line is fetched, e.g., on demand or upon prefetch.
(1) XI-invalidates - At each H[L], there is recorded whether L was XI-invalidated without refetching.
(2) CH Loc - At each H[L], there is also recorded local-change history, i.e., whether L was stored into since the last fetch.
It is also possible to keep a global H at the storage control element (SCE). In this case, the SCE maintains a table I recording, for each line L, information I[L] recording whether L involved XI-invalidates during the last accesses by a CP. Upon a cache miss to L from a processor CP i , the SCE prefetches some of those lines that involved XI-invalidates (indicated by I) into cache C i , if missing there. The management of table I is simple. When an XI-invalidate on L occurs, e.g., upon a store or an EX fetch, the corresponding entry is set. When L is accessed, e.g., upon D-fetch misses, without XI-invalidate, the entry in I is reset. Another criteria for turning an I entry OFF is when the line is fetched, e.g., on demand or upon prefetch.
公开/授权文献
- EP0394642A3 Data prefetching in caches 公开/授权日:1992-07-15
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