On recognizing first through P-th input patterns as first through P-th recognized patterns (P being greater than one) by using a plurality of reference patterns and a plurality of memorized identifiers identifying the reference patterns, a processing circuit (35) processes the first through the P-th input patterns into first through Q-th provisional patterns different from one another, where Q is not greater than the above-mentioned plurality. A calculating circuit (50) calculates dissimilarity degrees had by the reference patterns relative to the first through the Q-th provisional patterns to select, with repetition allowed as selected patterns, the reference patterns which have the dissimilarity degrees less than a predetermined degree. The calculating circuit thereby selects R particular identifiers and S different identifiers from the memorized identifiers, where R plus S is not greater than P and is not less than the plurality. Each particular identifier and each different identifier identify only one pattern and one of at least two patterns of the selected patterns. The other at least one of the above-mentioned at least two patterns is identified by at least one of the R particular identifiers. A determining circuit (60) determines first through P-th output identifiers identifying the first through the P-th recognized patterns by using the R particular idenifiers as ones, R in number, and others, S in number, of the first through the P-th output identifiers.