An operational amplifying circuit, the linearity of whose output voltage to the input voltage thereof can be ensured ranging from a first power supply to a second one. A differential circuit (1) comprising a first and a second FET transistor (T11, T12) having channels of a first conductive type, a current Miller circuit part (2) comprising a first and a second FET transistor (T13, T14) having channels of a second conductive type which are connected with the differential amplifying circuit (1) respectively, a constant current circuit part (3) which is connected to the differential amplifying circuit (1) on the second power supply (GND) side, and an output circuit part (4) comprising a third FET transistor (T7) of the second conductive type whose gate terminal is connected with the drain terminal of the second FET transistor (T12) and a constant current circuit. The potential (a) of the connecting part between the differential amplifying circuit part and the constant current circuit part (3) is set to zero volt or more when an input signal Vin is zero volt, and the potential difference between the potential (a) and the potential (b) of the gate of the third FET transistor is ensured in the whole range of the voltage change of the input signal Vin.