A circuit for linearizing analog-to-digital output is shown in Figure 2, with an analog signal V i transmitted by input circuit 10 is applied to an input port of an analog-to-digital converter 12 controlled by a sampling signal V s , to provide digital data V d on an "N" bit data bus 14. An analog-to-digital linearizing memory 16 storing a look-up table of digital values, is coupled to bus 14 to receive the digital data V d , and to respond to the digital data V d by providing true linear digital values from the look-up table to digital data processing system DSP 20 via an "N" bit data bus 18. A microprocessor 22 is temporarily coupled between the output port of converter 12 and the input port of memory 16 via bus 14, to serve as a switch between bus 14 and a programming memory 24 containing a table of true linear digital values V t . A known test signal is applied to input circuit 10, and true linear digital values V t stored in programming memory 24, are then read into linearizing memory 16 to provide an accurate and reliable relation to a characteristic such as the amplitude of each step of the known test signal over the entire range of the known test signal.