A logic circuit for outputting signals corresponding to an input signal depending on a clock signal sent from an external, includes at least one synchronous flip-flop (31, 32, 33, 34) being synchronized with the clock signal, the flip-flop for latching the input signal, and a unit (51, 52, 53, 54, 61, 62, 63, 64) for controlling an input of the clock signal to the flip-flop based on a difference between logic levels of an output signal of the flip-flop and an input signal newly latched by the flip-flop.