A sampling frequency converter capable of performing an operation of multiplications and additions at a lower speed and realizing with a small amount of hardware. The sampling frequency converter for converting input data sampled at a sampling frequency M into data sampled at sampling frequency N, includes: a non-cyclic digital filer including a memory (3) for sequentially putting and storing E data elements in response to clocks of the sampling frequency M, and reading the stored E data elements in parallel and in response to each clock of the sampling frequency M, a plurality of coefficient multipliers (K₀,K₁,...K₄₉) for selecting E coefficients in response to each clock of the sampling frequency N, the E coefficients being extracted from (J * E/M) coefficients every (J/M)-th where J is the least common denominator of M and N, and multiplying each data element read from the memory by a corresponding one of the selected coefficients, and an adder (A₂) for adding the multiplication results by the coefficient multipliers together; and a sampler (S₂) for sampling an output of the non-cyclic digital filter at the sampling frequency N.