发明公开
EP0621550A2 Method and apparatus for processing signals
失效
Verfahren und Einrichtung zur Signalverarbeitung。
- 专利标题: Method and apparatus for processing signals
- 专利标题(中): Verfahren und Einrichtung zur Signalverarbeitung。
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申请号: EP94302712.8申请日: 1994-04-15
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公开(公告)号: EP0621550A2公开(公告)日: 1994-10-26
- 发明人: Rapeli, Juha
- 申请人: NOKIA MOBILE PHONES LTD.
- 申请人地址: P.O. Box 86 SF-24101 Salo FI
- 专利权人: NOKIA MOBILE PHONES LTD.
- 当前专利权人: NOKIA MOBILE PHONES LTD.
- 当前专利权人地址: P.O. Box 86 SF-24101 Salo FI
- 代理机构: Frain, Timothy John
- 优先权: FI931831 19930423
- 主分类号: G06G7/184
- IPC分类号: G06G7/184
摘要:
The present invention relats to a method for processing a signal, and a signal processing circuit according to the method, in which circuit one or two transistors (T1, T2) switched according to the switches are used as the active member of the entire circuit, the charge passing through said transistors being controlled, in addition to the switches, by the transferrable charge itself so that on concluded transfer of charge, all current flow in the circuit stops by itself. By means of the present invention, the signal processing is, irrespective of the polarity of the signal (positive or negative) and of the threshold voltages (Uth1, Uth2) of the transistors, linear because the signal voltage (U S ) is produced, as taught by the invention, relative to a reference voltage (U Ref ) of predetermined magnitude in that a sum of the signal voltage (U S ) and said reference voltage (U Ref ) is produced and the polarity of said sum is every time the same as the polarity of the reference voltage (U Ref ), irrespective of the variation of the signal voltage (U S ), and when charge samples proportional to the signal voltage (U S ) are taken, a quantity thereof is taken which is proportional to the sum (U S + U Ref ) of the signal voltage (U S ) and the reference voltage (U Ref ), whereby the charge samples pro-portional to said sum (U S + U Ref ) are transferred to the integrating capacitance (C 0 ) included in the circuit, and thereafter, a quantity of charge samples proportional to the reference voltage (U Ref ) is added into the integrating capacitance (C 0 ) with an opposite polarity relative to the polarity of the charge samples proportional to said sum (U S + U Ref ).
公开/授权文献
- EP0621550B1 Method and apparatus for processing signals 公开/授权日:2001-01-10
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