A structure of an electronic device having a predetermined unidirectional conduction threshold, being formed on a chip of an N-semiconductor material, comprises a plurality of isolated N-regions (16a-c), each bounded laterally by an isolating region (15a-c) and at the bottom by two buried P- and N-regions which form in combination a junction with a predetermined reverse conduction threshold, and means (15a,18,17b,15b,17c) of connecting the junctions of the various isolated regions serially together in the same conduction sense; the buried N-region of the first junction (Z1) in the series is connected to a common electrode (C), which also is one terminal of the device, over an internal path (R) of the N-material of the chip, and the buried P-region of the last junction (Zn) in the series contains an additional buried N-region (14d) which is connected electrically to a second terminal (18a) of the device.