发明公开
EP0625837A2 Automatic false synchronization correction mechanism for biphase-modulated signal reception 失效
自动机构用于校正误同步,用于接收双相位调制信号。

  • 专利标题: Automatic false synchronization correction mechanism for biphase-modulated signal reception
  • 专利标题(中): 自动机构用于校正误同步,用于接收双相位调制信号。
  • 申请号: EP94201405.1
    申请日: 1994-05-18
  • 公开(公告)号: EP0625837A2
    公开(公告)日: 1994-11-23
  • 发明人: Rhebergen, Gertjan
  • 申请人: PHILIPS ELECTRONICS N.V.
  • 申请人地址: Groenewoudseweg 1 5621 BA Eindhoven NL
  • 专利权人: PHILIPS ELECTRONICS N.V.
  • 当前专利权人: PHILIPS ELECTRONICS N.V.
  • 当前专利权人地址: Groenewoudseweg 1 5621 BA Eindhoven NL
  • 代理机构: Bakker, Hendrik
  • 优先权: EP93201446 19930519
  • 主分类号: H04L7/033
  • IPC分类号: H04L7/033 H04L25/49
Automatic false synchronization correction mechanism for biphase-modulated signal reception
摘要:
The invention relates to an arrangement comprising a controllable clock signal source (1) and a decision circuit (8) for determining the polarity of a received biphase signal at two successive sampling instants in a single symbol interval. The arrangement likewise comprises a phase detector (35) with a first comparator (16) to compare the polarity samples at the two sampling instants with each other. The phase detector generates a control signal for adjusting the frequency and phase of the adjustable clock signal source (1) in response to the output signal of the first comparator. Furthermore, the arrangement comprises a second comparator (28) for comparing polarity samples at the same relative sampling instant in two successive sampling instants with each other. According to the invention the second comparator (28) will inhibit phase detector (35) in response to the output signal of this second detector. In the case of false synchronization, the output of phase detector (35) will continue to present the same signal value, so that automatically an adjustment is made of the instant of correct synchronization. This adjustment is carried out by a VCO (3) and/or phase shifter means (12).
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