发明公开
- 专利标题: Semiconductor apparatus
- 专利标题(中): 半导体装置
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申请号: EP94115748.9申请日: 1994-10-06
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公开(公告)号: EP0649215A1公开(公告)日: 1995-04-19
- 发明人: Kobayashi, Shinichi
- 申请人: FUJI ELECTRIC CO. LTD.
- 申请人地址: 1-1, Tanabeshinden, Kawasaki-ku Kawasaki 210 JP
- 专利权人: FUJI ELECTRIC CO. LTD.
- 当前专利权人: FUJI ELECTRIC CO. LTD.
- 当前专利权人地址: 1-1, Tanabeshinden, Kawasaki-ku Kawasaki 210 JP
- 代理机构: May, Hans Ulrich, Dr.
- 优先权: JP254614/93 19931013
- 主分类号: H02M7/00
- IPC分类号: H02M7/00
摘要:
To provide a terminal arrangement, for a semiconductor power converter apparatus, which effectively suppresses surge voltage, caused by stray inductance of the internal wiring, with conductor bars and snubber capacitors connected between DC input terminals.
Pairs of positive and negative terminals 2, 3 (2, 3) are arranged on the edge portions of the left and right sides of a rectangular upper face of the package 1, of a semiconductor apparatus for converting DC input to AC output, into which a plurality of semiconductor chips are incorporated, with the positive terminals 2, 2 and the negative terminals 3, 3 opposed facing to each other respectively. AC output terminals 4 are aligned on one of the other pair of the sides (upper side) and control terminals 5 on another side of the other side pair. Straight conductor bars 12, 12 are externally connected above the upper surface of the package 1 between the positive terminals 2, 2 and between the negative terminals 3, 3.
Pairs of positive and negative terminals 2, 3 (2, 3) are arranged on the edge portions of the left and right sides of a rectangular upper face of the package 1, of a semiconductor apparatus for converting DC input to AC output, into which a plurality of semiconductor chips are incorporated, with the positive terminals 2, 2 and the negative terminals 3, 3 opposed facing to each other respectively. AC output terminals 4 are aligned on one of the other pair of the sides (upper side) and control terminals 5 on another side of the other side pair. Straight conductor bars 12, 12 are externally connected above the upper surface of the package 1 between the positive terminals 2, 2 and between the negative terminals 3, 3.
公开/授权文献
- EP0649215B1 Semiconductor apparatus 公开/授权日:1996-10-09
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