A specific pattern in an inputted digital signal is detected (13) and the input digital signal is sampled and held (14) in accordance with such a detection output. A clock (15-17) whose phase is synchronized with the input digital signal is generated on the basis of the sampling output. With such a construction as mentioned above, the phase of the clock can be optimally controlled by a simple construction. The clock can be precisely extracted from the input digital signal, so that the operation of a circuit is also stable.