发明公开
- 专利标题: Multiplication circuit
- 专利标题(中): 乘法电路
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申请号: EP95115333.7申请日: 1995-09-28
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公开(公告)号: EP0707275A1公开(公告)日: 1996-04-17
- 发明人: Shou, Guoliang, c/o Yozan Inc. , Motohashi, Kazunori, c/o Yozan Inc. , Yamamoto, Makoto, c/o Yozan Inc. , Takatori, Sunao, c/o Yozan Inc.
- 申请人: YOZAN INC. , SHARP KABUSHIKI KAISHA
- 申请人地址: 3-5-18, Kitazawa, Setagaya-ku Tokyo 155 JP
- 专利权人: YOZAN INC.,SHARP KABUSHIKI KAISHA
- 当前专利权人: YOZAN INC.,SHARP KABUSHIKI KAISHA
- 当前专利权人地址: 3-5-18, Kitazawa, Setagaya-ku Tokyo 155 JP
- 代理机构: Grünecker, Kinkeldey, Stockmair & Schwanhäusser Anwaltssozietät
- 优先权: JP261615/94 19940930; JP224714/95 19950809
- 主分类号: G06J1/00
- IPC分类号: G06J1/00
摘要:
A multiplication circuit comprises a plurality of the first switching means for receiving a common analog input voltage and a reference voltage and for alternatively outputting the input voltage or the reference voltage, the first capacitive coupling with a plurality of capacitances for receiving outputs of the first switching means are inputted, the first inverted amplifier for receiving an output of the first capasitive coupling, an output of the first inverted amplifier being fed back to its input; the second inverted amplifier for receiving the output of the first inverted amplifier, an output of the second inverted amplifier being fed back to its inputand characterized in that one or more of the capacitances in the first capacitive coupling is connected to the second capacitive coupling with a plurality of capacitances and that a plurality of the second switching means are connected to each capacitances of the second capacitive coupling, the second switching means alternatively outputting the analog input voltage or the reference voltage.
公开/授权文献
- EP0707275B1 Multiplication circuit 公开/授权日:2000-04-12
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