发明公开
EP0710021A3 Input-output circuit, recording apparatus and reproduction apparatus for digital video signal
失效
Eingangs-Ausgangsschaltung,Aufnahme- und Wiedergabeanlagefürdigitales Fernsehsignal
- 专利标题: Input-output circuit, recording apparatus and reproduction apparatus for digital video signal
- 专利标题(中): Eingangs-Ausgangsschaltung,Aufnahme- und Wiedergabeanlagefürdigitales Fernsehsignal
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申请号: EP95116895.4申请日: 1995-10-26
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公开(公告)号: EP0710021A3公开(公告)日: 1997-08-13
- 发明人: Okamoto, Hiroo , Hosokawa, Kyoichi , Owashi, Hitoaki , Tachibana, Hiroaki, Hamingu Hitachi F201 , Noguchi, Takaharu
- 申请人: HITACHI, LTD.
- 申请人地址: 6, Kanda Surugadai 4-chome Chiyoda-ku, Tokyo 101 JP
- 专利权人: HITACHI, LTD.
- 当前专利权人: HITACHI, LTD.
- 当前专利权人地址: 6, Kanda Surugadai 4-chome Chiyoda-ku, Tokyo 101 JP
- 代理机构: Altenburg, Udo, Dipl.-Phys.
- 优先权: JP264874/94 19941028; JP140294/95 19950607
- 主分类号: H04N5/926
- IPC分类号: H04N5/926
摘要:
A video signal input-output circuit and a recording-reproduction apparatus in which a digitally compressed video signal input in packet form can be recorded and reproduced efficiently and in stable fashion. In this apparatus, a clock reference is detected from a packet signal containing the clock reference and a digitally compressed video signal, a time stamp for a packet is generated using a clock signal in phase with the clock reference and added to the particular packet, and the packet signals with the time stamp added thereto are recorded closely to each other in a data storage element such as a magnetic recording medium. At playback, the packet interval is output by being restored to the original length on the basis of the time stamp added to the packet in store.
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