发明公开
- 专利标题: INTEGRATED CIRCUIT PACKAGE
- 专利标题(中): 集成电路HOUSING
-
申请号: EP95910140.0申请日: 1995-01-26
-
公开(公告)号: EP0734588A1公开(公告)日: 1996-10-02
- 发明人: FISCHER, Paul, James , PETEFISH, William, George
- 申请人: W.L. GORE & ASSOCIATES, INC.
- 申请人地址: 551 Paper Mill Road, P.O. Box 9206 Newark, Delaware 19714-9206 US
- 专利权人: W.L. GORE & ASSOCIATES, INC.
- 当前专利权人: W.L. GORE & ASSOCIATES, INC.
- 当前专利权人地址: 551 Paper Mill Road, P.O. Box 9206 Newark, Delaware 19714-9206 US
- 代理机构: McCallum, William Potter, et al
- 优先权: US19940323985 19941017
- 国际公布: WO1996012299 19960425
- 主分类号: H01L23
- IPC分类号: H01L23
摘要:
An integrated circuit package for housing an integrated circuit (IC) chip and providing electrical connectivity of data signals and voltage signals between the IC chip and an electronic component includes a substrate, an IC chip affixed to the substrate and at least three conductive layers on the substrate. The three conductive layers include at least a first voltage layer adjacent to the substrate for providing a first reference voltage signal (i.e., ground) to the IC chip, a second voltage layer for providing a second reference voltage signal (i.e., power) to the IC chip, and a signal layer. To maximize speed and minimize complexing, all of the data signals to the IC chip are routed on the signal layer. The power and ground layers are closely coupled and separated by a dielectric layer having a relatively high dielectric constant for providing significant decoupling capacitance. A low dielectric layer is provided for separating the power layer from the signal layer. A plurality of electrical connections interconnect bonding pads on the IC chip with the electronic component (e.g., a PCB) by way of at least one of the conductive layers.
信息查询